Digilent Nexys Board Reference Manual


Nexys 4 DDR Artix-7 FPGA Board | Trenz Electronic GmbH Online Shop (EN)

Digilent Nexys Board Reference Manual - arithmetic core lphaAdditional info:FPGA provenWishBone Compliant: NoLicense: LGPLDescriptionRTL Verilog code to perform Two Dimensional Fast Hartley Transform (2D-FHT) for 8x8 points.Presented algorithm is FHT with decimation in frequency domain.Main FeaturesHigh Clock SpeedLow Latency(97 clock cycles)Low Slice CountSingle Clock Cycle per sample operationFully synchronous core with.

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